mips: fix cacheinfo
authorVladimir Kondratiev <vladimir.kondratiev@linux.intel.com>
Tue, 16 Jul 2019 07:36:56 +0000 (10:36 +0300)
committerPaul Burton <paul.burton@mips.com>
Thu, 18 Jul 2019 21:41:04 +0000 (14:41 -0700)
commitb8bea8a5e5d942e62203416ab41edecaed4fda02
tree06bd6eedc7a4d500436542a7f0943be2762d3c14
parenta07e3324538a989b7cdbf2c679be6a7f9df2544f
mips: fix cacheinfo

Because CONFIG_OF defined for MIPS, cacheinfo attempts to fill information
from DT, ignoring data filled by architecture routine. This leads to error
reported

 cacheinfo: Unable to detect cache hierarchy for CPU 0

Way to fix this provided in
commit fac51482577d ("drivers: base: cacheinfo: fix x86 with
 CONFIG_OF enabled")

Utilize same mechanism to report that cacheinfo set by architecture
specific function

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@linux.intel.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
arch/mips/kernel/cacheinfo.c