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(parent: 2d2c73c) | patch
[AArch64] Fix BTI instruction emission.
authorDaniel Kiss <daniel.kiss@arm.com>
Mon, 15 Jun 2020 13:02:38 +0000 (15:02 +0200)
committerDaniel Kiss <daniel.kiss@arm.com>
Mon, 15 Jun 2020 13:04:36 +0000 (15:04 +0200)
commitb8ae3fdfa579dbf366b1bb1cbfdbf8c51db7fa55
tree54b02e525494d0685c769b3d84eeb09fa4119f95tree | snapshot
parent2d2c73c5cfdedf55f6e1a8ae7f59ee54e2d89c99commit | diff
[AArch64] Fix BTI instruction emission.

Summary:
SCTLR_EL1.BT[01] controls the PACI[AB]SP compatibility with PBYTE 11
(see [1])
This bit will be set to zero so PACI[AB]SP are equal to BTI C
instruction only.

[1] https://developer.arm.com/docs/ddi0595/b/aarch64-system-registers/sctlr_el1

Reviewers: chill, tamas.petz, pbarrio, ostannard

Reviewed By: tamas.petz, ostannard

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81746
llvm/lib/Target/AArch64/AArch64BranchTargets.cpp diff | blob | history
llvm/test/CodeGen/AArch64/branch-target-enforcement.mir diff | blob | history
Domain: System / Toolchain;