[mips] Remove codegen support from some 16 bit instructions
authorSimon Dardis <simon.dardis@mips.com>
Fri, 16 Feb 2018 13:34:23 +0000 (13:34 +0000)
committerSimon Dardis <simon.dardis@mips.com>
Fri, 16 Feb 2018 13:34:23 +0000 (13:34 +0000)
commitb8ae30ececa97de2839600fb6645830050eea0f7
treecef671f9cec26656eb114f0fa78c93e31a4fb345
parent1c7211d7544f365d595cff4d886e00ee36072bbe
[mips] Remove codegen support from some 16 bit instructions

These instructions conflict with their full length variants
for the purposes of FastISel as they cannot be distingushed
based on the number and type of operands and predicates.

Reviewers: atanasyan

Differential Revision: https://reviews.llvm.org/D41285

llvm-svn: 325341
llvm/lib/Target/Mips/MicroMips32r6InstrInfo.td
llvm/test/CodeGen/Mips/llvm-ir/and.ll
llvm/test/CodeGen/Mips/llvm-ir/ashr.ll
llvm/test/CodeGen/Mips/llvm-ir/lshr.ll
llvm/test/CodeGen/Mips/llvm-ir/or.ll
llvm/test/CodeGen/Mips/llvm-ir/shl.ll
llvm/test/CodeGen/Mips/llvm-ir/xor.ll