clk: meson: meson8b: add support for the GP_PLL clock on Meson8m2
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Sun, 24 Mar 2019 15:11:03 +0000 (16:11 +0100)
committerNeil Armstrong <narmstrong@baylibre.com>
Mon, 1 Apr 2019 11:34:09 +0000 (13:34 +0200)
commitb882964b376f214ef3d96d8a643c7c46121c30a8
tree6dc0ac81f09c913b586d06f28dc3a91cdfecbb35
parent32cd198a1a505566f8e9d2c925bcfc8b889bbc23
clk: meson: meson8b: add support for the GP_PLL clock on Meson8m2

Meson8m2 has a GP_PLL clock (similar to GP0_PLL on GXBB/GXL/GXM) which
is used as input for the VPU clocks.
The only supported frequency (based on Amlogic's vendor kernel sources)
is 364MHz which is achieved using the following parameters:
- input: XTAL (24MHz)
- M = 182
- N = 3
- OD = 2 ^ 2

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lkml.kernel.org/r/20190324151104.18397-4-martin.blumenstingl@googlemail.com
drivers/clk/meson/meson8b.c
drivers/clk/meson/meson8b.h