RISC-V: Add RVV instructions classification
authorzhongjuzhe <juzhe.zhong@rivai.ai>
Sat, 27 Aug 2022 10:57:23 +0000 (18:57 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Mon, 29 Aug 2022 02:16:03 +0000 (10:16 +0800)
commitb842690086b588349637125c114d5fdcbb79531f
treee4be38fb8c983649907f42d494c0b606a13d1867
parentb37f96f1afab2d6ed32625e04700bd55b02261c2
RISC-V: Add RVV instructions classification

gcc/ChangeLog:

* config/riscv/riscv.md: Add new type for vector instructions.
gcc/config/riscv/riscv.md