watchdog: renesas_wdt: Add a few cycles delay
authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Wed, 5 Jun 2019 05:04:00 +0000 (14:04 +0900)
committerWim Van Sebroeck <wim@linux-watchdog.org>
Mon, 8 Jul 2019 17:39:44 +0000 (19:39 +0200)
commitb836005b4f95cccdc1f53849a31cac2dc375f4b7
tree38382bf14eb80c8fb4de63faf13e7a6fc1ff5bb0
parent1a4aaf9f11f9937e93fe9907e6c2320a10a9f269
watchdog: renesas_wdt: Add a few cycles delay

According to the hardware manual of R-Car Gen2 and Gen3,
software should wait a few RLCK cycles as following:
 - Delay 2 cycles before setting watchdog counter.
 - Delay 3 cycles before disabling module clock.

So, this patch adds such delays.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
drivers/watchdog/renesas_wdt.c