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[RISCV] Rename mnemonics slliu.w->slli.uw and addu.w->add.uw to match 0.93 bitmanip...
authorCraig Topper <craig.topper@sifive.com>
Fri, 22 Jan 2021 18:57:00 +0000 (10:57 -0800)
committerCraig Topper <craig.topper@sifive.com>
Fri, 22 Jan 2021 20:49:10 +0000 (12:49 -0800)
commitb825278364d9551ec3e8eb9f776f722238c9b3d8
tree77c1570667b9fb04fedfd30bcc1d9dff70b34f9ctree | snapshot
parentd985c7321f0b9cbaf8f8423a7faa645bb5966fc8commit | diff
[RISCV] Rename mnemonics slliu.w->slli.uw and addu.w->add.uw to match 0.93 bitmanip spec.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94582
llvm/lib/Target/RISCV/RISCVInstrInfoB.td diff | blob | history
llvm/test/CodeGen/RISCV/rv64Zbb.ll diff | blob | history
llvm/test/MC/RISCV/rv64zbb-invalid.s diff | blob | history
llvm/test/MC/RISCV/rv64zbb-valid.s diff | blob | history
Domain: System / Toolchain;