clk: sunxi-ng: add support for H6 PRCM CCU
authorIcenowy Zheng <icenowy@aosc.io>
Thu, 3 May 2018 18:38:41 +0000 (02:38 +0800)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Fri, 4 May 2018 15:05:46 +0000 (17:05 +0200)
commitb7c7b05065aa77ae3d7b70b9139ed58970daed78
treed241bfa4719e5a3020602704a5ed41c00084b8d3
parent60cc43fc888428bb2f18f08997432d426a243338
clk: sunxi-ng: add support for H6 PRCM CCU

The H6 has clock/reset controls in PRCM part, like old SoCs such as H3
and A64. However, the PRCM CCU is rearranged; the register arragement
is now similar to the main CCU of H6, and the PRCM now has two APB
buses to control -- one is clocked from AHB clock derivde from AR100
clock, the other is clocked from the same mux with AR100 clock.
Therefore a new driver is written for it.

As there's no official document about the PRCM in H6, all the information
are indirectly collected from BSP and parts of the document, and the
information source is noted as comments in the driver's source code. If
reliable information is provided furtherly, the driver needs to be
rechecked.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Documentation/devicetree/bindings/clock/sunxi-ccu.txt
drivers/clk/sunxi-ng/Kconfig
drivers/clk/sunxi-ng/Makefile
drivers/clk/sunxi-ng/ccu-sun50i-h6-r.c [new file with mode: 0644]
drivers/clk/sunxi-ng/ccu-sun50i-h6-r.h [new file with mode: 0644]
include/dt-bindings/clock/sun50i-h6-r-ccu.h [new file with mode: 0644]
include/dt-bindings/reset/sun50i-h6-r-ccu.h [new file with mode: 0644]