cris: Enable single-bit btst/btstq to set condition codes.

cris: Enable single-bit btst/btstq to set condition codes.

Enables the use of btst / btstq for a single bit (at other bits
than 0, including as indicated by a variable) to set
condition-codes.  There's also a bug-fix for the bit-0-btstq
pattern; it shouldn't generate CCmode as only the Z flag is
valid, still using CC_NZmode is ok, as only equality-tests are
generated.  The cris_rtx_costs tweak is necessary or else
combine will consider the btst not preferable.  It reduces the
difference to cc0-costs beyond the threshold to the
transformation being seen as profitable, but there's still a
difference in values for the pre-split-time btst+branch as
opposed to the cc0 btst and branch, with both appearing to be
the cost of several insns (18 and 22).

gcc:
	* config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
	* config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
	* config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
	(znnCC, rznnCC): New code_attrs.
	("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET.  Remove
	obseolete comment.  Add belt-and-suspenders mode-test to condition.
	Add fixme regarding remaining matched-but-not-generated case.
	("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
	("*cbranch<mode>4_btstqb0_<CC>"): Rename from
	"*cbranch<mode>4_btstq<CC>".  Split to CC_NZ instead of CC.
	("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
	Handle output of CC_ZnNmode.
	("*b<nzcond:code>_reversed<mode>"): Ditto.