[ARM] GlobalISel: Support G_(S|U)DIV for s32
authorDiana Picus <diana.picus@linaro.org>
Mon, 24 Apr 2017 08:20:05 +0000 (08:20 +0000)
committerDiana Picus <diana.picus@linaro.org>
Mon, 24 Apr 2017 08:20:05 +0000 (08:20 +0000)
commitb70e88bdec9791538624399131071e56e124641a
treed5f25c705e691f3c17dff80cbc6aad04a0f5c495
parente97822e1b7af54c20f0185340e87168ab4e00dec
[ARM] GlobalISel: Support G_(S|U)DIV for s32

Add support for both targets with hardware division and without. For
hardware division we have to add support throughout the pipeline
(legalizer, reg bank select, instruction select). For targets without
hardware division, we only need to mark it as a libcall.

llvm-svn: 301164
llvm/lib/Target/ARM/ARMInstructionSelector.cpp
llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp
llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
llvm/test/CodeGen/ARM/GlobalISel/arm-isel-divmod.ll [new file with mode: 0644]
llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir [new file with mode: 0644]
llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir