MIPS: SEAD3: Probe interrupt controllers using DT
authorPaul Burton <paul.burton@imgtec.com>
Fri, 26 Aug 2016 14:17:34 +0000 (15:17 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 4 Oct 2016 23:31:20 +0000 (01:31 +0200)
commitb6d5e47e67292542a41c3fe367bacb364eb4e601
tree009d252825c827993b2b6fb67b21827cb1fc20a4
parent0a15273666aa18a45985e6419afa05ec24ecfeb4
MIPS: SEAD3: Probe interrupt controllers using DT

Probe the CPU interrupt controller & optional Global Interrupt
Controller (GIC) using devicetree rather than platform code. Because the
bootloader on SEAD3 does not provide a device tree to the kernel & the
device tree is always built in, we patch out the GIC node during boot if
we detect that a GIC is not present in the system.

The appropriate IRQ domain is discovered by platform code setting up
device IRQ numbers temporarily. It will be removed by further patches
which move the devices towards being probed via device tree.

No behavioural change is intended by this patch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: Kefeng Wang <wangkefeng.wang@huawei.com>
Cc: Jacek Anaszewski <j.anaszewski@samsung.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14047/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/boot/dts/mti/sead3.dts
arch/mips/include/asm/mach-sead3/sead3-dtshim.h [new file with mode: 0644]
arch/mips/include/asm/mips-boards/sead3int.h
arch/mips/mti-sead3/Makefile
arch/mips/mti-sead3/sead3-dtshim.c [new file with mode: 0644]
arch/mips/mti-sead3/sead3-int.c
arch/mips/mti-sead3/sead3-platform.c
arch/mips/mti-sead3/sead3-setup.c