X86: Do not select X86 custom vector nodes if operand types don't match
authorMatthias Braun <matze@braunis.de>
Tue, 21 Apr 2015 01:13:41 +0000 (01:13 +0000)
committerMatthias Braun <matze@braunis.de>
Tue, 21 Apr 2015 01:13:41 +0000 (01:13 +0000)
commitb6b5aaad9836302ed5ab7c936b527dcae667f1d0
tree6d34b3b194d4f7aeb00bb21a28fdea4d604a63c1
parent396db8895801f0f753c32f30ef70ae80b28ddfe1
X86: Do not select X86 custom vector nodes if operand types don't match

X86ISD::ADDSUB, X86ISD::(F)HADD, X86ISD::(F)HSUB should not be selected
if the operand types do not match the result type because vector type
legalization cannot deal with this for custom nodes.

Testcase X86ISD::ADDSUB is attached. I could not create a testcase for
the FHADD/FHSUB cases because of: https://llvm.org/bugs/show_bug.cgi?id=23296

Differential Revision: http://reviews.llvm.org/D9120

llvm-svn: 235367
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/sse3-avx-addsub-2.ll