powerpc/serdes: Add the workaround for erratum A-007186
authorShaveta Leekha <shaveta@freescale.com>
Wed, 28 May 2014 08:48:55 +0000 (14:18 +0530)
committerYork Sun <yorksun@freescale.com>
Thu, 5 Jun 2014 20:45:07 +0000 (13:45 -0700)
commitb6808cd82d616bec2c357fb1b95116efe5b6f98c
treed594585e8814f6f20d5d70a3f34545e4794ed887
parent9855b3beca648dabe4d86b06d36bf219ebd0732d
powerpc/serdes: Add the workaround for erratum A-007186

SerDes PLL is calibrated at reset. When the junction temperature
delta from the time the PLL is calibrated exceeds +56C/-66C,
jitter may increase and can cause PLL to unlock.

This workaround overwrite the SerDes registers with new values,
to calibrate SerDes registers.
These values are known to work fine for all temperature ranges.

This workaround is valid for B4, T4 and T2 platforms, so
added in their config.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
[York Sun: replaced typedef ccsr_sfp_regs_t with struct ccsr_sfp_regs]
Reviewed-by: York Sun <yorksun@freescale.com>
arch/powerpc/cpu/mpc85xx/cmd_errata.c
arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
arch/powerpc/include/asm/config_mpc85xx.h
arch/powerpc/include/asm/immap_85xx.h