drm: hdlcd: Add debugfs entry for displaying current pixelclock value
When asking the hardware to set a new pixelclock value we might
timeout on values that are calculated during request and not
wait for the actual outcome of the clock setting. SCP could still
finish the brute force search for the best PLL settings and might
or might not set the requested resolution. To help track the
current value of the pixelclock, add a new entry in debugfs that
displays the HW programmed value vs the one that was requested
for the current running mode.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>