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(parent: 348364b) | patch
[VE] Support rest of load/store instructions in MC layer
authorKazushi (Jam) Marukawa <marukawa@nec.com>
Tue, 9 Jun 2020 12:20:32 +0000 (14:20 +0200)
committerSimon Moll <simon.moll@emea.nec.com>
Tue, 9 Jun 2020 12:21:00 +0000 (14:21 +0200)
commitb641c9f729fe4ebbc3e737fa69d3d9caf1cb3632
treeb31b0532774885de8c909f5ebc9b48432edde1f5tree | snapshot
parent348364bffd379e291501dc49b192cdd2adf83811commit | diff
[VE] Support rest of load/store instructions in MC layer

Summary:
Add DLD/DLDU/DLDL/PFCH/TS1AM/TS2AM/TS3AM/ATMAM/CAS instructions newly.
Add regression tests for them to asmparser, mccodeemitter, and disassembler.
In order to add those instructions, change asmparser to support UImm0to2 and
UImm1 operands, add new decode functions to disassembler, and add new print
functions to instprinter.

Differential Revision: https://reviews.llvm.org/D81454
13 files changed:
llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp diff | blob | history
llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp diff | blob | history
llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp diff | blob | history
llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h diff | blob | history
llvm/lib/Target/VE/VEInstrFormats.td diff | blob | history
llvm/lib/Target/VE/VEInstrInfo.td diff | blob | history
llvm/test/MC/VE/ATMAM.s [new file with mode: 0644] blob
llvm/test/MC/VE/CAS.s [new file with mode: 0644] blob
llvm/test/MC/VE/DLD.s [new file with mode: 0644] blob
llvm/test/MC/VE/PFCH.s [new file with mode: 0644] blob
llvm/test/MC/VE/TS1AM.s [new file with mode: 0644] blob
llvm/test/MC/VE/TS2AM.s [new file with mode: 0644] blob
llvm/test/MC/VE/TS3AM.s [new file with mode: 0644] blob
Domain: System / Toolchain;