drm/i915/dg1: Update DMC_DEBUG3 register
authorChuansheng Liu <chuansheng.liu@intel.com>
Fri, 11 Feb 2022 00:29:33 +0000 (08:29 +0800)
committerMatt Roper <matthew.d.roper@intel.com>
Tue, 15 Feb 2022 04:55:39 +0000 (20:55 -0800)
commitb60668cb4c57a7cc451de781ae49f5e9cc375eaf
tree7de7ad2c5cd69e5c85f3326a4763e7eab7e76db1
parent4feb2e9eb95f785ea39d5a7e69b845354c2691b3
drm/i915/dg1: Update DMC_DEBUG3 register

Current DMC_DEBUG3(_MMIO(0x101090)) address is for TGL,
it is wrong for DG1. Just like commit 5bcc95ca382e
("drm/i915/dg1: Update DMC_DEBUG register"), correct
this issue for DG1 platform to avoid wrong register
being read.

BSpec: 49788

v2: fix "not wrong" typo. (Jani)

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Chuansheng Liu <chuansheng.liu@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220211002933.84240-1-chuansheng.liu@intel.com
drivers/gpu/drm/i915/display/intel_display_debugfs.c
drivers/gpu/drm/i915/i915_reg.h