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(parent: da4d620) | patch
armv8: fsl_lsch2: Add LS1046A SoC support
authorMingkai Hu <mingkai.hu@nxp.com>
Tue, 5 Jul 2016 08:01:55 +0000 (16:01 +0800)
committerYork Sun <york.sun@nxp.com>
Tue, 26 Jul 2016 16:02:23 +0000 (09:02 -0700)
commitb528b9377df0e738c6904a639a1e78810936f825
treeab3f786883fc5988efad56848cdc65dff803e34ftree | snapshot
parentda4d620c90eb6dd9466a89837ab8667048d856e3commit | diff
armv8: fsl_lsch2: Add LS1046A SoC support

The LS1046A processor is built on the QorIQ LS series architecture
combining four ARM A72 processor cores with DPAA 1.0 support.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Mihai Bantea <mihai.bantea@freescale.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/Makefile diff | blob | history
arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc diff | blob | history
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c diff | blob | history
arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c [new file with mode: 0644] blob
arch/arm/include/asm/arch-fsl-layerscape/config.h diff | blob | history
arch/arm/include/asm/arch-fsl-layerscape/cpu.h diff | blob | history
arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h diff | blob | history
arch/arm/include/asm/arch-fsl-layerscape/soc.h diff | blob | history
Domain: System / Kernel;