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[ARM] Add some more missing T1 opcodes for the peephole optimisier
authorDavid Green <david.green@arm.com>
Mon, 25 Feb 2019 15:50:54 +0000 (15:50 +0000)
committerDavid Green <david.green@arm.com>
Mon, 25 Feb 2019 15:50:54 +0000 (15:50 +0000)
commitb504f104b2d9d8eaedd2e687b0f028f63c2c139c
tree85febaca2baf36eeb2e963250db78a6c7f334cf5tree | snapshot
parenta066f1f9e6fc5f1399060a2cd22335ec4de7bb90commit | diff
[ARM] Add some more missing T1 opcodes for the peephole optimisier

This adds a few extra Thumb1 opcodes to improve the peephole opimisers
ability to remove redundant cmp instructions. tADC and tSBC require
a small fixup to prevent MOVS being moved past the instruction, giving
the wrong flags.

Differential Revision: https://reviews.llvm.org/D58281

llvm-svn: 354791
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp diff | blob | history
llvm/test/CodeGen/ARM/arm-and-tst-peephole.ll diff | blob | history
llvm/test/CodeGen/Thumb/peephole-mi.mir [new file with mode: 0644] blob
llvm/test/CodeGen/Thumb/umulo-128-legalisation-lowering.ll diff | blob | history
Domain: System / Toolchain;