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(parent: a29df37) | patch
power: optimize the power consumption of vad wakeup [1/1]
authorzhiqiang liang <zhiqiang.liang@amlogic.com>
Fri, 10 May 2019 05:34:49 +0000 (13:34 +0800)
committerTao Zeng <tao.zeng@amlogic.com>
Tue, 17 Sep 2019 02:41:42 +0000 (19:41 -0700)
commitb4ea53ce1f8ce21016a5d2b5ada70da76ad3f350
tree14f0b367656f24b54194909a026052cbbbc0a7cdtree | snapshot
parenta29df37e41161e41f2cfa656111d6a2781b9f75ecommit | diff
power: optimize the power consumption of vad wakeup [1/1]

PD#SWPL-3826

Problem:
optimize the power consumption of tl1 with vad wakeup

Solution:
optimize the power consumption when enter freeze mode
switch the clk81 to 24M
cpu and dsu clk switch to gp1 pll，frequency is 600M
closed the fixed pll
closed the vddio_3.3V

Verify:
TL1 revB

Change-Id: I39170bb8efb91b126b6a15faad3cefee19b13089
Signed-off-by: zhiqiang liang <zhiqiang.liang@amlogic.com>
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Hong Guo <hong.guo@amlogic.com>
15 files changed:
MAINTAINERS diff | blob | history
arch/arm/boot/dts/amlogic/mesontl1.dtsi diff | blob | history
arch/arm/boot/dts/amlogic/tl1_t962x2_t309.dts diff | blob | history
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_1g.dts diff | blob | history
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_2g.dts diff | blob | history
arch/arm64/boot/dts/amlogic/mesontl1.dtsi diff | blob | history
arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts diff | blob | history
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g.dts diff | blob | history
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_2g.dts diff | blob | history
drivers/amlogic/clk/tl1/tl1.c diff | blob | history
drivers/amlogic/clk/tl1/tl1_clk-pll.c diff | blob | history
drivers/amlogic/pm/Makefile diff | blob | history
drivers/amlogic/pm/gx_pm.c diff | blob | history
drivers/amlogic/pm/vad_power.c [new file with mode: 0644] blob
drivers/amlogic/pm/vad_power.h [new file with mode: 0644] blob
Domain: System / Kernel;