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[AArch64] PR target/85512: Tighten SIMD right shift immediate constraints pt2
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Fri, 27 Apr 2018 08:48:49 +0000 (08:48 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Fri, 27 Apr 2018 08:48:49 +0000 (08:48 +0000)
commitb4c0db25786e91c57903bd5c2387ab98907d5523
treeede70c94da25f6b302c75cfc025ea1c1f28ba511tree | snapshot
parent9f47a64fccccb215eacf52aea827b577eabdb1f0commit | diff
[AArch64] PR target/85512: Tighten SIMD right shift immediate constraints pt2

PR target/85512
* config/aarch64/constraints.md (Usg): Limit to 31.
(Usj): Limit to 63.

From-SVN: r259699
gcc/ChangeLog diff | blob | history
gcc/config/aarch64/constraints.md diff | blob | history
Domain: System / Toolchain;