pci: fix address range check in __pci_hose_phys_to_bus()
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>
Wed, 18 Nov 2015 14:05:06 +0000 (15:05 +0100)
committerTom Rini <trini@konsulko.com>
Mon, 23 Nov 2015 16:01:52 +0000 (11:01 -0500)
commitb4bd6554937ca5c13786b6725e122839f5ebe4f7
treef85f3113264df3d4819e199279ffcd62ffd9bf1a
parentcfdaf4caa250a4bc3de41f47147715e8a81be5a2
pci: fix address range check in __pci_hose_phys_to_bus()

The address range check may overflow if the memory region is located at
the top of the 32-bit address space. This can e.g. be seen on TK1 if
using the E1000 gigabit Ethernet driver where start and size are both
0x80000000 leading to the following messages:

Apalis TK1 # tftpboot $loadaddr test_file
Using e1000#0 device
TFTP from server 192.168.10.1; our IP address is 192.168.10.2
Filename 'test_file'.
Load address: 0x80408000
Loading: pci_hose_phys_to_bus: invalid physical address

This patch fixes this by changing the order of the addition vs.
subtraction in the range check just like already done in
__pci_hose_bus_to_phys().

Reported-by: Ivan Mercier <ivan.mercier@nexvision.fr>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
drivers/pci/pci_common.c