dt-bindings: clk: add PolarFire SoC fabric clock ids
authorConor Dooley <conor.dooley@microchip.com>
Thu, 8 Sep 2022 14:36:50 +0000 (15:36 +0100)
committerClaudiu Beznea <claudiu.beznea@microchip.com>
Wed, 14 Sep 2022 07:57:07 +0000 (10:57 +0300)
commitb4b025246c0fbb8611a26bab121596f47f0bf116
tree8d8396e9d38cadad3d62638fff52231a2708ac5d
parent3ffb5ad24d0064f923ed30ad37e33e56eee31f2b
dt-bindings: clk: add PolarFire SoC fabric clock ids

Each Clock Conditioning Circuitry block contains 2 PLLs and 2 DLLs.
The PLLs have 4 outputs each and the DLLs 2. Add 16 new IDs covering
these clocks. For more information on the CCC hardware, see the
"PolarFire SoC FPGA Clocking Resources" document at the link below.

Link: https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220908143651.1252601-4-conor.dooley@microchip.com
include/dt-bindings/clock/microchip,mpfs-clock.h