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(parent: 4086b3b) | patch
[mlir][Vector] Switch ExtractOp to the declarative assembly format
authorBenjamin Kramer <benny.kra@googlemail.com>
Fri, 18 Feb 2022 10:39:48 +0000 (11:39 +0100)
committerBenjamin Kramer <benny.kra@googlemail.com>
Fri, 18 Feb 2022 10:45:59 +0000 (11:45 +0100)
commitb47be47ac2871b6f63f4acbaea8fa5e311f1ecc5
treeda6b44a022058f22ba4e95bd2674445c7d530fe2tree | snapshot
parent4086b3be4422b0f8eb09c948b39dd495aeee05d9commit | diff
[mlir][Vector] Switch ExtractOp to the declarative assembly format

This is a bit awkward since ExtractOp allows both `f32` and
`vector<1xf32>` results for a scalar extraction. Allow both, but make
inference return the scalar to make this as NFC as possible.
mlir/include/mlir/Dialect/Vector/IR/VectorOps.td diff | blob | history
mlir/lib/Dialect/Vector/IR/VectorOps.cpp diff | blob | history
mlir/test/Dialect/Vector/invalid.mlir diff | blob | history
Domain: System / Toolchain;