MIPS: dts: mscc: describe the PTP ready interrupt
authorAntoine Tenart <antoine.tenart@bootlin.com>
Wed, 24 Jul 2019 08:17:11 +0000 (10:17 +0200)
committerPaul Burton <paul.burton@mips.com>
Sat, 24 Aug 2019 14:17:37 +0000 (15:17 +0100)
commitb4742e6682d5809ddf4d0a63cb57e629e815ec63
tree8773e70c984f06e5ad2533d28a22bf0daacd3a61
parent048dc3abe82738567435d9caa106a20eb417b28a
MIPS: dts: mscc: describe the PTP ready interrupt

This patch adds a description of the PTP ready interrupt, which can be
triggered when a PTP timestamp is available on an hardware FIFO.

Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: davem@davemloft.net
Cc: richardcochran@gmail.com
Cc: alexandre.belloni@bootlin.com
Cc: UNGLinuxDriver@microchip.com
Cc: ralf@linux-mips.org
Cc: jhogan@kernel.org
Cc: netdev@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: thomas.petazzoni@bootlin.com
Cc: allan.nielsen@microchip.com
arch/mips/boot/dts/mscc/ocelot.dtsi