[Hexagon] Fix isTypeForHVX for vector predicates
authorKrzysztof Parzyszek <kparzysz@quicinc.com>
Mon, 10 Oct 2022 22:53:10 +0000 (15:53 -0700)
committerKrzysztof Parzyszek <kparzysz@quicinc.com>
Fri, 14 Oct 2022 21:38:41 +0000 (14:38 -0700)
commitb465a983168bf87dc269848c82ffc49ac8dbec20
treea00efec68bbcb78e1afa7519c1330bdcae2dfbab
parent0d6000025788ebc3947cf6d4001fdd582c6c2a99
[Hexagon] Fix isTypeForHVX for vector predicates

HexagonSubtarget::isTypeFixHVX would stop breaking the type up when it
reached 64 bits in width. HVX vector predicates can be shorter than that,
for example <32 x i1> would have a bitwidth of 32, and it's still a valid
HVX type.
llvm/lib/Target/Hexagon/HexagonSubtarget.cpp