soc: mediatek: mtk-mmsys: Change MT8173 num_resets to 64
The MT8173 SoC has 64 MMSYS resets, split in two contiguous 32-bits
registers, MMSYS_SW0_RST_B (0x140) and MMSYS_SW1_RST_B (0x144), as
also stated in the downstream kernel for the Amazon Fire TV 2
(Sloane) in the ddp_reg.h header.
Please note that managing more than 32 reset bits is supported since commit
2004f8be8483 ("soc: mediatek: mmsys: add mmsys for support 64 reset bits")
This commit brings no functional changes.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230309102618.114157-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>