clk: imx: imx8mm: fix int pll clk gate
authorPeng Fan <peng.fan@nxp.com>
Mon, 20 May 2019 02:03:19 +0000 (02:03 +0000)
committerStephen Boyd <sboyd@kernel.org>
Tue, 21 May 2019 18:42:44 +0000 (11:42 -0700)
commitb3fddd5b100e4aee4f7ec58360435024971dea47
tree9db3e3002629ddf6147a3cbb548cb4214ce02a54
parentf7df8c92b4b90a891972fb782b3eaac836efa601
clk: imx: imx8mm: fix int pll clk gate

To Frac pll, the gate shift is 13, however to Int PLL the gate shift
is 11.

Cc: <stable@vger.kernel.org>
Fixes: ba5625c3e27 ("clk: imx: Add clock driver support for imx8mm")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/imx/clk-imx8mm.c