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(parent: 8ed48ca) | patch
Set the force bits to read URB offset/length for SF stage on BDW
authorZhao Yakui <yakui.zhao@intel.com>
Fri, 1 Mar 2013 02:38:13 +0000 (10:38 +0800)
committerXiang, Haihao <haihao.xiang@intel.com>
Thu, 27 Feb 2014 02:04:12 +0000 (10:04 +0800)
commitb3cb310bb47dbd30c3f07ff573c9c6afa4d8abeb
treeff1dcd4de0031d1729609b6808f4b7879835398btree | snapshot
parent8ed48ca2b0d8dc68a7c503b4b8c17f8ea1d16c20commit | diff
Set the force bits to read URB offset/length for SF stage on BDW

Otherwise it can't fill the thread payload correctly for pixel shader.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
src/i965_defines.h diff | blob | history
src/i965_render.c diff | blob | history
Domain: Multimedia / Uncategorized;