perf/x86/kvm: Add Cascade Lake Xeon steppings to isolation_ucodes[]
authorJim Mattson <jmattson@google.com>
Fri, 5 Feb 2021 19:13:24 +0000 (11:13 -0800)
committerPeter Zijlstra <peterz@infradead.org>
Wed, 10 Feb 2021 13:44:54 +0000 (14:44 +0100)
commitb3c3361fe325074d4144c29d46daae4fc5a268d5
tree6d0241e01d805bfdeb512003fabc615913976f72
parent32451614da2a9cf4296f90d3606ac77814fb519d
perf/x86/kvm: Add Cascade Lake Xeon steppings to isolation_ucodes[]

Cascade Lake Xeon parts have the same model number as Skylake Xeon
parts, so they are tagged with the intel_pebs_isolation
quirk. However, as with Skylake Xeon H0 stepping parts, the PEBS
isolation issue is fixed in all microcode versions.

Add the Cascade Lake Xeon steppings (5, 6, and 7) to the
isolation_ucodes[] table so that these parts benefit from Andi's
optimization in commit 9b545c04abd4f ("perf/x86/kvm: Avoid unnecessary
work in guest filtering").

Signed-off-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/20210205191324.2889006-1-jmattson@google.com
arch/x86/events/intel/core.c