[RISCV] Avoid generating AssertZext for LP64 ABI when lowering floating LibCall
authorShiva Chen <shiva0217@gmail.com>
Wed, 28 Aug 2019 23:40:37 +0000 (23:40 +0000)
committerShiva Chen <shiva0217@gmail.com>
Wed, 28 Aug 2019 23:40:37 +0000 (23:40 +0000)
commitb39876d8cddb3d16b69481810151604ab6afa542
treefdfd090d32cc1a6a47e8e460199fde1785d682e3
parentf91b6f8159b101688eef87c75179209699c0d405
[RISCV] Avoid generating AssertZext for LP64 ABI when lowering floating LibCall

The patch fixed the issue that RV64 didn't clear the upper bits
when return complex floating value with lp64 ABI.

float _Complex
complex_add(float _Complex a, float _Complex b)
{
   return a + b;
}

RealResult = zero_extend(RealA + RealB)
ImageResult = ImageA + ImageB
Return (RealResult | (ImageResult << 32))

The patch introduces shouldExtendTypeInLibCall target hook to suppress
the AssertZext generation when lowering floating LibCall.

Thanks to Eli's comments from the Bugzilla
https://bugs.llvm.org/show_bug.cgi?id=42820

Differential Revision: https://reviews.llvm.org/D65497

llvm-svn: 370275
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/test/CodeGen/RISCV/calling-conv-lp64.ll
llvm/test/CodeGen/RISCV/rv32i-rv64i-float-double.ll
llvm/test/CodeGen/RISCV/rv64i-complex-float.ll [new file with mode: 0644]
llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll [new file with mode: 0644]