parisc: Use per-pagetable spinlock
authorMikulas Patocka <mpatocka@redhat.com>
Sat, 27 Apr 2019 22:09:53 +0000 (00:09 +0200)
committerHelge Deller <deller@gmx.de>
Fri, 3 May 2019 21:47:41 +0000 (23:47 +0200)
commitb37d1c1898b288c69f3dc9267bc2c41af06f4a4b
treed041b4796035a447687ae8b1bc7d904c39f8729b
parentd19a12906e5e558c0f6b6cfece7b7caf1012ef95
parisc: Use per-pagetable spinlock

PA-RISC uses a global spinlock to protect pagetable updates in the TLB
fault handlers. When multiple cores are taking TLB faults simultaneously,
the cache line containing the spinlock becomes a bottleneck.

This patch embeds the spinlock in the top level page directory, so that
every process has its own lock. It improves performance by 30% when
doing parallel compilations.

At least on the N class systems, only one PxTLB inter processor
broadcast can be active at any one time on the Merced bus. If a Merced
bus is found, this patch serializes the TLB flushes with the
pa_tlb_flush_lock spinlock.

v1: Initial patch by Mikulas
v2: Added Merced detection by Helge
v3: Revised TLB serialization by Dave & Helge

Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
arch/parisc/include/asm/hardware.h
arch/parisc/include/asm/pgalloc.h
arch/parisc/include/asm/pgtable.h
arch/parisc/include/asm/tlbflush.h
arch/parisc/kernel/cache.c
arch/parisc/kernel/drivers.c
arch/parisc/kernel/entry.S
arch/parisc/kernel/inventory.c
arch/parisc/kernel/setup.c