[X86][Costmodel] Load/store i16 Stride=6 VF=4 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Tue, 28 Sep 2021 16:15:01 +0000 (19:15 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Tue, 28 Sep 2021 16:15:01 +0000 (19:15 +0300)
commitb3011bcc78926686dd95bd5dbb4c2c66d8be24a2
tree805e37c1ed197f9b73a1f9718eddd132fc3f2edb
parentaa93c55889ec6284e0337d6baf01c71dadd76043
[X86][Costmodel] Load/store i16 Stride=6 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/1Wcaf9c7T - for intels `Block RThroughput: =9.0`; for ryzens, `Block RThroughput: <=4.5`
So pick cost of `9`.

For store we have:
https://godbolt.org/z/1Wcaf9c7T - for intels `Block RThroughput: =15.0`; for ryzens, `Block RThroughput: <=6.0`
So pick cost of `15`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110591
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-6.ll