KVM: x86/mmu: Tweak PSE hugepage handling to avoid 2M vs 4M conundrum
authorSean Christopherson <sean.j.christopherson@intel.com>
Tue, 28 Apr 2020 00:54:20 +0000 (17:54 -0700)
committerPaolo Bonzini <pbonzini@redhat.com>
Fri, 15 May 2020 16:26:10 +0000 (12:26 -0400)
commitb2f432f872d9b4eb07d35f7bd5aa68c48a756f1a
treec43915702270b3d04328039fff5c0a0fef9deaea
parenta71936ab46f1da1539d97a98dfb2f94ee383d687
KVM: x86/mmu: Tweak PSE hugepage handling to avoid 2M vs 4M conundrum

Change the PSE hugepage handling in walk_addr_generic() to fire on any
page level greater than PT_PAGE_TABLE_LEVEL, a.k.a. PG_LEVEL_4K.  PSE
paging only has two levels, so "== 2" and "> 1" are functionally the
same, i.e. this is a nop.

A future patch will drop KVM's PT_*_LEVEL enums in favor of the kernel's
PG_LEVEL_* enums, at which point "walker->level == PG_LEVEL_2M" is
semantically incorrect (though still functionally ok).

No functional change intended.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Message-Id: <20200428005422.4235-2-sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/mmu/paging_tmpl.h