ARM: tegra: pinmux: partially handle varying register layouts
authorStephen Warren <swarren@nvidia.com>
Tue, 24 Feb 2015 21:08:27 +0000 (14:08 -0700)
committerTom Warren <twarren@nvidia.com>
Wed, 4 Mar 2015 17:09:00 +0000 (10:09 -0700)
commitb2cd3d810387095e525522de6cae2716f4c20870
tree83a0c0ba0d23cb01a7bfa72bb9c9b6b8cb3dc94b
parentbc13472867beaf350b569a98c49a102476537e4f
ARM: tegra: pinmux: partially handle varying register layouts

Tegra210 moves some bits around in the pinmux registers. Update the code
to handle this.

This doesn't attempt to address the issues with the group-to-group varying
drive group register layout mentioned earlier. This patch handles the
SoC-to-SoC differences in the mux register layout.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/mach-tegra/pinmux-common.c