clk: shmobile: rcar-gen2: Fix clock parent for all non-PLL clocks
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tue, 7 Jan 2014 12:54:26 +0000 (13:54 +0100)
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Mon, 24 Feb 2014 12:09:32 +0000 (13:09 +0100)
commitb29dd35909c4ac074e84e8e7000fe525fe33c1a1
tree1a3e457e18ac089c3fc2d67ce8558c282af51957
parentcfbf8d4857c26a8a307fb7cd258074c9dcd8c691
clk: shmobile: rcar-gen2: Fix clock parent for all non-PLL clocks

The lb, qspi, sdh, sd0 and sd1 clocks have the PLL1 (divided by 2) as
their parent, not the main clock. Fix it.

This bug introduced in v3.14-rc1 breaks various devices on the Lager and
Kolesh shmobile boards and should thus be considered as a regression for
which a fix during the -rc series is appropriate.

Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
drivers/clk/shmobile/clk-rcar-gen2.c