clk: tl1: fix stack overflow when set rate for dsu clock [1/1]
authorJian Hu <jian.hu@amlogic.com>
Thu, 16 May 2019 11:11:19 +0000 (19:11 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Thu, 16 May 2019 13:20:42 +0000 (06:20 -0700)
commitb297971b697a8ef708286ac2c4434a5c859dfee3
treef23412d315957c216a804a08aa41e0a45836ab8b
parent9eafec254a22cce33f846b0398ec7ea0074ab1b0
clk: tl1: fix stack overflow when set rate for dsu clock [1/1]

PD#SWPL-8546

Problem:
stack overflow

Solution:
remove clk_set_rate in dsu clock notifier

Verify:
tl1 X301

Change-Id: Ie4b2fe929446ade505c714d11c1474146d188ac2
Signed-off-by: Sandy Luo <sandy.luo@amlogic.com>
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
drivers/amlogic/clk/tl1/tl1.c