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[RISCV] Add RV64 test cases for vluxseg.
authorHsiangkai Wang <kai.wang@sifive.com>
Thu, 21 Jan 2021 15:37:05 +0000 (23:37 +0800)
committerHsiangkai Wang <kai.wang@sifive.com>
Sat, 23 Jan 2021 00:54:56 +0000 (08:54 +0800)
commitb23fe6ff6ff736a5d319598bc818defc09968200
treee411c8be4665d035d001a776a96ee4c00e89ea83tree | snapshot
parenta41cb92eb81b3c1446b563f1483fbe71feecc1eecommit | diff
[RISCV] Add RV64 test cases for vluxseg.

Differential Revision: https://reviews.llvm.org/D95190
llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll [new file with mode: 0644] blob
Domain: System / Toolchain;