[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
authorDaniel Sanders <daniel.sanders@imgtec.com>
Thu, 22 May 2014 11:46:58 +0000 (11:46 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Thu, 22 May 2014 11:46:58 +0000 (11:46 +0000)
commitb230595839918e57b0a887d2a4ec1c6fc3d7de8a
treea7f3a3ed94645fe47ccefb72f43d1ff94f016a01
parent9288b2181f1d89b90df0496a1f4bba0bb16d99ce
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's

Summary:
This patch is necessary so that they do not fail on MIPS32r6/MIPS64r6 when
-integrated-as is enabled by default and we correctly detect the host CPU.

No functional change since these tests are testing the behaviour of the
constraint used for the third operand rather than the mnemonic.

Depends on D3842

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3843

llvm-svn: 209421
llvm/test/CodeGen/Mips/inlineasm-cnstrnt-bad-I-1.ll
llvm/test/CodeGen/Mips/inlineasm-cnstrnt-bad-J.ll
llvm/test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll
llvm/test/CodeGen/Mips/inlineasm-cnstrnt-bad-N.ll
llvm/test/CodeGen/Mips/inlineasm-cnstrnt-bad-O.ll
llvm/test/CodeGen/Mips/inlineasm-cnstrnt-bad-P.ll
llvm/test/CodeGen/Mips/inlineasm-cnstrnt-reg.ll
llvm/test/CodeGen/Mips/inlineasm-cnstrnt-reg64.ll
llvm/test/CodeGen/Mips/inlineasm-operand-code.ll
llvm/test/CodeGen/Mips/inlineasm_constraint.ll