drm/i915/xehpsdv: Move render/compute engine reset domains related workarounds
authorSrinivasan Shanmugam <srinivasan.s@intel.com>
Tue, 1 Mar 2022 23:15:49 +0000 (15:15 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 2 Mar 2022 14:52:42 +0000 (06:52 -0800)
commitb2006061ae28fe7e84af6c9757ee89c4e505e92b
tree58c7890aeb640114aabea88d0cd1825a35f3036c
parentff6b19d3a0f939465b1e40040c4c4869154bf516
drm/i915/xehpsdv: Move render/compute engine reset domains related workarounds

Registers that exist in the shared render/compute reset domain need to
be placed on an engine workaround list to ensure that they are properly
re-applied whenever an RCS or CCS engine is reset.  We have a number of
workarounds (updating registers MLTICTXCTL, L3SQCREG1_CCS0,
GEN12_MERT_MOD_CTRL, and GEN12_GAMCNTRL_CTRL) that are incorrectly
implemented on the 'gt' workaround list and need to be moved
accordingly.

Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.s@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220301231549.1817978-14-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c