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[LoongArch] Add earlyclobber of destination register to atomic instructions
authorgonglingqin <gonglingqin@loongson.cn>
Wed, 12 Oct 2022 12:43:22 +0000 (20:43 +0800)
committerWeining Lu <luweining@loongson.cn>
Wed, 12 Oct 2022 13:09:21 +0000 (21:09 +0800)
commitb1d7a95e4e4a2b57cbe02636bbe357dc48d615c5
treeb25f0cd618b498b0ece1a1471903c9a2f2ea06ectree | snapshot
parentec6da3fb9d8c7859da22d9eb7e814faf2e5a524acommit | diff
[LoongArch] Add earlyclobber of destination register to atomic instructions

If the AM* atomic memory access instruction has the same register number as
rd and rj, the execution will trigger an Instruction Non-defined Exception.
If the AM* atomic memory access instruction has the same register number as
rd and rk, the execution result is uncertain.

Reference: https://github.com/loongson/LoongArch-Documentation

Differential Revision: https://reviews.llvm.org/D135641
llvm/lib/Target/LoongArch/LoongArchInstrInfo.td diff | blob | history
llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll diff | blob | history
Domain: System / Toolchain;