i2c: at91: fix clk_offset for sama5d2
authorMichał Mirosław <mirq-linux@rere.qmqm.pl>
Mon, 22 Jul 2019 19:05:56 +0000 (21:05 +0200)
committerWolfram Sang <wsa@the-dreams.de>
Thu, 1 Aug 2019 20:24:16 +0000 (22:24 +0200)
commitb1ac6704493fa14b5dc19eb6b69a73932361a131
tree263f1ceeab29390f30d35ce31395f915d7d6add3
parentd12e3aae160fb26b534c4496b211d6e60a5179ed
i2c: at91: fix clk_offset for sama5d2

In SAMA5D2 datasheet, TWIHS_CWGR register rescription mentions clock
offset of 3 cycles (compared to 4 in eg. SAMA5D3).

Cc: stable@vger.kernel.org # 5.2.x
[needs applying to i2c-at91.c instead for earlier kernels]
Fixes: 0ef6f3213dac ("i2c: at91: add support for new alternative command mode")
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
drivers/i2c/busses/i2c-at91-core.c