Merge branch 'CR_866_SDIO_clivia.cai' into 'jh7110_fpga_dev_5.15'
authorandy.hu <andy.hu@starfivetech.com>
Thu, 21 Apr 2022 07:46:19 +0000 (07:46 +0000)
committerandy.hu <andy.hu@starfivetech.com>
Thu, 21 Apr 2022 07:46:19 +0000 (07:46 +0000)
commitb1774c1effe0172a052a327385eb996305f510b5
tree5d33c843eb3c0c5029e9c5b36130fb1f82d32a55
parent464f4d01438254cda485e9dbe65ec0002a03bee1
parentaf73b21b118d5c733f51fc08647f3ac772075bd2
Merge branch 'CR_866_SDIO_clivia.cai' into 'jh7110_fpga_dev_5.15'

dt-bingings:sd:update jh7110 sd dt-bingings

See merge request sdk/sft-riscvpi-linux-5.10!17
arch/riscv/boot/dts/starfive/jh7110.dtsi