[X86][SSE] Added support for SSE3 lane duplication shuffle instructions
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 21 Jan 2015 22:44:35 +0000 (22:44 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Wed, 21 Jan 2015 22:44:35 +0000 (22:44 +0000)
commitb16b09b154f2a8468dcfaa9a8eb5297d59cbd7cd
tree081164c2a076347cc91e92f3a0da3b47c48194d9
parentd9987c7b0de0ce5ee523427269e1993254ef2353
[X86][SSE] Added support for SSE3 lane duplication shuffle instructions

This patch adds shuffle matching for the SSE3 MOVDDUP, MOVSLDUP and MOVSHDUP instructions. The big use of these being that they avoid many single source shuffles from needing to use (pre-AVX) dual source instructions such as SHUFPD/SHUFPS: causing extra moves and preventing load folds.

Adding these instructions uncovered an issue in XFormVExtractWithShuffleIntoLoad which crashed on single operand shuffle instructions (now fixed). It also involved fixing getTargetShuffleMask to correctly identify theses instructions as unary shuffles.

Also adds a missing tablegen pattern for MOVDDUP.

Differential Revision: http://reviews.llvm.org/D7042

llvm-svn: 226716
14 files changed:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86InstrSSE.td
llvm/test/CodeGen/X86/avx-splat.ll
llvm/test/CodeGen/X86/avx2-vbroadcast.ll
llvm/test/CodeGen/X86/sincos-opt.ll
llvm/test/CodeGen/X86/sse41.ll
llvm/test/CodeGen/X86/sse_partial_update.ll
llvm/test/CodeGen/X86/v2f32.ll
llvm/test/CodeGen/X86/vec_cast2.ll
llvm/test/CodeGen/X86/vector-shuffle-128-v2.ll
llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
llvm/test/CodeGen/X86/vector-shuffle-combining.ll