AMDGPU: Partially shrink 64-bit shifts if reduced to 16-bit
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 9 May 2018 20:52:43 +0000 (20:52 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 9 May 2018 20:52:43 +0000 (20:52 +0000)
commitb143d9a5eabd6957a67daec4f02ab9209c358644
tree733da5c2d38e452ed7bcf9b5a323df7fee154522
parentd3e55bf7fcfdcec61aa025b81551ec0bab975a09
AMDGPU: Partially shrink 64-bit shifts if reduced to 16-bit

This is an extension of an existing combine to reduce wider
shls if the result fits in the final result type. This
introduces the same combine, but reduces the shift to a middle
sized type to avoid the slow 64-bit shift.

llvm-svn: 331916
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll [new file with mode: 0644]