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[AArch64] Fix creation of invalid instructions with XZR register
authorDavid Green <david.green@arm.com>
Wed, 8 Feb 2023 13:17:10 +0000 (13:17 +0000)
committerDavid Green <david.green@arm.com>
Wed, 8 Feb 2023 13:17:10 +0000 (13:17 +0000)
commitb134c62facef01dabf901ee6a6283e3b0fb3a249
tree6d77f49120c1c79e32f16f465612cc438ffec843tree | snapshot
parent22d98280dd8ee70064899eefb973a1c020605874commit | diff
[AArch64] Fix creation of invalid instructions with XZR register

A combination of GlobalISel and MachineCombiner can end up creating
`SUB xrz, (MOVI -2105098)` instructions which have not been constant
folded. The AArch64MIPeepholeOpt pass will then attempt to create
`ADD xzr, 513, lsl 12`, which is not a valid instruction. This adds
a bail out of the transform if the register is xzr/wzr.

Fixes #60528

Differential Revision: https://reviews.llvm.org/D143475
llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp diff | blob | history
llvm/test/CodeGen/AArch64/addsub-24bit-imm.mir diff | blob | history
Domain: System / Toolchain;