[RISCV] Switch to using get.active.lane.mask when tail folding
authorPhilip Reames <preames@rivosinc.com>
Fri, 8 Jul 2022 17:19:49 +0000 (10:19 -0700)
committerPhilip Reames <listmail@philipreames.com>
Fri, 8 Jul 2022 17:24:59 +0000 (10:24 -0700)
commitb12930e1338b3559e2b2376bd13bc600cceb5249
tree0252630a7ca3018fee628a92fefeff75e06171d4
parent92f1794d41831dbc9ffc7c6bb4b606e65eb1c8ed
[RISCV] Switch to using get.active.lane.mask when tail folding

The motivation here is to a) bring us closer into alignment with AArch64 under the assumption that codepath is better tested, and b) simplify pattern matching in an upcoming change.

The immediate impact is a significant IR reduction but a fairly minimal change in the generated assembly. Due to a difference in expansion behavior we get a saturating add vs an unsaturating one for the old code, but that's about it. This difference comes down to different handling of overflow, which doesn't seem to be possible here anyways, so the assembly codegen is arguably a minor regression. I don't expect that to matter in practice.

Differential Revision: https://reviews.llvm.org/D129221
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
llvm/test/Transforms/LoopVectorize/RISCV/scalable-tailfold.ll