drm/i915/icp: Add Panel Power Sequencing Support
authorAnusha Srivatsa <anusha.srivatsa@intel.com>
Thu, 11 Jan 2018 18:00:07 +0000 (16:00 -0200)
committerPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 19 Jan 2018 19:57:36 +0000 (17:57 -0200)
commitb0d6a0f27e2ce77dc48527404d3a15ebf1b5d26d
treeb4e0a2c63a80b8c474b512f77c006f0f9bb10f2f
parent4ef99abd07ef3ceb014b4359ec4a977d7ae8a8f9
drm/i915/icp: Add Panel Power Sequencing Support

ICP, like BXT, has has two panel power sequencers.

v2: Simplify the code. Remove unwanted register definitions.
Make code as close to BXT style as possible. (Ville)
Also, remove the use of ICP_SECOND_PPS_BACKLIGHT for now.
Moving forward, if we are sure we need to set this register,
we can access it.

v3: Use INTEL_GEN(dev_priv), make code more readeable. (Ville)

v4 (from Paulo):
 - Coding style fixes.
 - Add a missing HAS_PCH_CNP -> gen10+ check.
 - Rebase.

v5: Use per platform checks rather than INTEL_GEN().
    v4 of this patch breaks on CoffeeLake, since CFL uses
    CNP and per platform check makes sense in that case.

v6 (from Paulo):
 - v5 was a patch on top of v4, not a new version. Now v6 is correctly
   a new version of the original patch.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180111180010.24357-6-paulo.r.zanoni@intel.com
drivers/gpu/drm/i915/intel_dp.c