arm: socfpga: fix Gen5 enable of EMAC via FPGA
authorRalph Siemsen <ralph.siemsen@linaro.org>
Tue, 29 Sep 2020 18:52:05 +0000 (14:52 -0400)
committerLey Foon Tan <ley.foon.tan@intel.com>
Wed, 21 Oct 2020 03:45:54 +0000 (11:45 +0800)
commitb0b08ce0b7b13520412f1768a0d3290d3c5f50fb
tree6b073149ad42070403ced9e5eb463e6c5002c3b0
parent7ec87e4192215815b658c3f8b34e4be010103149
arm: socfpga: fix Gen5 enable of EMAC via FPGA

An earlier conversion from struct to defines introduced two errors, both
related to setup of EMAC routed via the FPGA. One of the offsets was
incorrect, and the EMAC0/EMAC1 were swapped.

The effect of this was rather odd: both ports could operate at gigabit,
but one of them would fail to transmit when operating at 100Mbit.

Fixes: db5741f7a85ec3ee79b64496172afaa7dc2cb225 ("arm: socfpga: Convert system manager from struct to defines")

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
arch/arm/mach-socfpga/include/mach/system_manager_gen5.h