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author	Petar Avramovic <Petar.Avramovic@amd.com>
	Mon, 29 Mar 2021 09:12:46 +0000 (11:12 +0200)
committer	Petar Avramovic <Petar.Avramovic@amd.com>
	Mon, 29 Mar 2021 09:13:55 +0000 (11:13 +0200)
commit	b082e6f88acffe76841b9095ba024f585174b13a
tree	91189fcfbea248ed9925365169e4d779140c4df3	tree \| snapshot
parent	3c95bdf9fa35f0fe2143ea859b624c8f09513adb	commit \| diff

[AMDGPU] Extend gfx10 test coverage. NFC.

Differential Revision: https://reviews.llvm.org/D99267

183 files changed:

llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-abs.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-local.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-and-or.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shuffle-vector.v2s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smulh.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-flat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-local.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.v2s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umulh.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-trunc.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp2.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fadd.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fmin.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-and.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/roundeven.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/amd.endpgm.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/ctlz.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/early-term.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/fneg-fold-legalize-dag-increase-insts.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/fpow.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/frem.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/fshl.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/fshr.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/gws-hazards.mir		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/idiv-licm.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.mulo.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/load-local.128.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/load-local.96.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/ptrmask.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/saddo.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/saddsat.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/shl.v2i16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/ssubsat.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/store-local.128.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/store-local.96.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fadd.f32.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fadd.f64.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fma.f16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fma.f32.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fma.f64.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fmul.f32.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fmul.f64.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fsub.f32.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/strict_fsub.f64.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/sub.v2i16.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/usubsat.ll		diff \| blob \| history
llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll		diff \| blob \| history

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