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[RISCV] Remove redundant test cases for index segment store (6/8).
authorHsiangkai Wang <kai.wang@sifive.com>
Fri, 19 Feb 2021 03:09:49 +0000 (11:09 +0800)
committerHsiangkai Wang <kai.wang@sifive.com>
Fri, 19 Feb 2021 03:56:08 +0000 (11:56 +0800)
commitb0168a3896eed6ce69886139dc5ae5c983742464
tree3e036fbb223f6ff39b8b0f1732252782c01c019ctree | snapshot
parentde6d640f6d21d78344b6a834f03148963b8a6f5ccommit | diff
[RISCV] Remove redundant test cases for index segment store (6/8).

Differential Revision: https://reviews.llvm.org/D97024
llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll diff | blob | history
Domain: System / Toolchain;